CPLDs — Part 2
complex programmable logic devices
Graphical Programming
by David A. Ward
of a CPLD
The first article in this series introduced CPLDs (Complex Programmable Logic Devices)
and listed some items that needed to be purchased before experimenting with them.
If you have everything ready, we can now look at programming, breadboarding, and
testing CPLDs. We’ll be doing things a little out of order, since normally after designing
a circuit you would run a simulation to see if it behaves the way you want. Then, you’d
proceed to program the CPLD. The setup and running of a simulation will be saved for
Part 3. We’ll get right into programming at this time. A word of caution, however,
concerning the steps we’ll be going through in Xilinx ISE to get the CPLD programmed.
The Xilinx ISE Project Navigator software can appear very complicated and many of the
menus are context-sensitive. So, it’s likely that you’ll run into some difficulties, but it
does work well and with a little time you won’t feel so overwhelmed by everything
going on in the XiIinx ISE windows.
When you launch Xilinx ISE 12. 3, you’ll see a tip of the day window. After this is closed, you can select the new project button on the lower left-hand side of the screen; it’s located on the start tab (see
Figure 1). Next, you’ll see the New Project Wizard window
as shown in Figure 2. Locate a directory and name your
project. At the bottom of this window, you can select your
Top-level source type — select schematic this time, and
finally select next. The next window is the project settings
window shown in Figure 3. For this project, we’ll select an
XC9572XL CPLD in a PC44 package with a speed of - 10 nS.
All of the other choices in this window should be okay in
their default settings; then select next.
FIGURE 1.
52 SERVO 04.2011
FIGURE 2.
