SCREENSHOT 1. The Microchip
TCP/IP Configuration Wizard takes
the place of my manual configuration
process. The target files selected at
startup are loaded with the selected
configuration parameters.
SCREENSHOT 2. It is intuitively obvious to
the most casual observer that these
selections coincide with the generated
TCPIPConfig MRF24WB0M PIC32 Starter
Kits.h definitons.
SCREENSHOT 3. All of the IP address
information flows with the data from
the DHCP server. The Pmod WiFi has its
own MAC address which will replace
the default MAC address shown here.
SCREENSHOT 4. The information
here flows into the WF_Config.h file.
The Cerebot 32MX7 is configured to
actively search out a network instead
of listening to beacons.
54 SERVO 08.2011
to its pushbuttons. Only pushbuttons 0, 1, and 2 are
physically available. Since USB is readily available, there are no
plans to use a UART. However, we must modify the UART
TRIS bits to avoid a conflict with the SPI portal:
#define UARTTX_TRIS
#define UARTRX_TRIS
(TRISFbits.TRISF13)
(TRISFbits.TRISF22)
The MRF24J40MB communicates with the 32MX7’s
PIC32MX795F512L over an SPI channel. If you take a look at
the 32MX7 and the Pmod WiFi schematics, port JD seems to
be the closest fit for the MRF24J40MB-based Pmod WiFi
module. However, port JE is the best fit for the 32MX7. So,
we’ll alter the SPI2 definitions to point to port JE of the
Cerebot 32MX7:
//—————————————————————————
// MRF24WB0M WiFi I/O pins
//—————————————————————————
// MRF24WB0M in CEREBOT 32MX7 PORT JE
// MRF24WB0M in SPI2 slot
#define WF_CS_TRIS (TRISDbits.TRISD14)
#define WF_CS_IO (LATDbits.LATD14)
#define WF_SDI_TRIS (TRISFbits.TRISF2)
#define WF_SCK_TRIS (TRISDbits.TRISD15)
#define WF_SDO_TRIS (TRISFbits.TRISF8)
#define WF_RESET_TRIS (TRISAbits.TRISA6)
#define WF_RESET_IO (LATAbits.LATA6)
#define WF_INT_TRIS (TRISAbits.TRISA14)
// INT3
#define WF_INT_IO (PORTAbits.RA14)
#define WF_HIBERNATE_TRIS (TRISAbits.TRISA7)
#define WF_HIBERNATE_IO (PORTAbits.RA7)
#define WF_INT_EDGE (INTCONbits.INT3EP)
#define WF_INT_IE (IEC0bits.INT3IE)
#define WF_INT_IF (IFS0bits.INT3IF)
#define WF_INT_IE_CLEAR IEC0CLR
#define WF_INT_IF_CLEAR IFS0CLR
#define WF_INT_IE_SET IEC0SET
#define WF_INT_IF_SET IFS0SET
#define WF_INT_BIT 0x00008000
#define WF_INT_IPCSET IPC3SET
#define WF_INT_IPCCLR IPC3CLR
#define WF_INT_IPC_MASK 0xFF000000
#define WF_INT_IPC_VALUE 0x0C000000
#define WF_SSPBUF
#define WF_SPISTAT
#define WF_SPISTATbits
#define WF_SPICON1
#define WF_SPICON1bits
#define WF_SPI_IE_CLEAR
#define WF_SPI_IF_CLEAR
#define WF_SPI_INT_BITS
#define WF_SPI_BRG
#define WF_MAX_SPI_FREQ
(SPI3BUF)
(SPI3STAT)
(SPI3STATbits)
(SPI3CON)
(SPI3CONbits)
IEC0CLR
IFS0CLR
0x1C000000
(SPI3BRG)
(10000000ul)
// Hz
Navigating the Interrupts chapter of the PIC32 Family
Reference is akin to reading War and Peace. As far as
interrupts are concerned, in a nutshell what we’ve done in
our customization is set up a basis for recognizing, setting,
and clearing the interrupt bits associated with the SPI3 portal
and external interrupt INT3.
TCP/IP Configuration
I normally perform the TCP/IP configuration by manually
altering the contents of the TCP/IP stack’s configuration files.
It’s time to change my old-fashioned ways. This time around,
we’ll configure TCP/IP using the Microchip TCP/IP
Configuration Wizard. The target files are TCPIPConfig
MRF24WB0M PIC32 Starter Kits.h and WF_Config.h.
