that 22 x 16 = 352, not 240.
This is because some of the
CLBs are not there to make
room for other structures
which will be discussed in the
Also located in the FPGA
are IOBs (input/output blocks).
There are four IOB banks in the
FPGA (see Figure 5). The IOB
block takes care of the physical
interconnections from the internal logic to the FPGA pins
themselves. The IOBs can be configured to over 20 I/O
standards and drive from 2 mA up to 16 mA. For the
circuits that will be demonstrated in these articles, we will
use the LVTTL (low voltage TTL) I/O standard where 3.3V is
a logic “1.” We can also set the drive at 16 mA to directly
drive LEDs. The slew rate can be configured from slow to
fast to match the appropriate devices the FPGA may be
There are 72K bits of block RAM in the FPGA. There
are also four 18-bit dedicated multipliers. There are two
DCMs (digital clock managers) as shown in Figure 6. The
block RAM, multipliers, and DCMs take up some of the CLB
space; that is why there are only 240 CLBs instead of 352.
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