controlled by applying a pulse width modulation (PWM)
signal to the DRV8833 input pins. Naturally, the PWM
mode also allows the attached motor or motors to be
reversed. The PWM logic table for the DRV8833 is
contained within Figure 3.
Let’s shift our attention to Schematic 1.
The DRV8833 AINx and BINx inputs are all
tied logically low via resistors R3-R6. The
DRV8833 AINx and BINx pins are being fed
from a pair of 1: 2 demultiplexers. The logic
level at the A input of each multiplexer is
passed to the Y0 or Y1 demultiplexer
output, depending on the logical state of
the select pin. The Yx output pin that is not
selected reverts to a high impedance state.
In that the DRV8833 inputs are pulled
logically low, it is imperative that the
deselected demultiplexer output not
influence the DRV8833 input pin. The
NL7SZ18 1: 2 demultiplexer truth table is
shown in Figure 4.
We can close out our DRV8833 input
circuitry examination by observing that
shorting J2 will put the DRV8833 to sleep
and disable the H-bridge circuitry. We can
also say with certainty that if we manage
to overcurrent, overheat, or undervoltage the DRV8833
outputs, an active low fault signal will be presented at pin 1
of J4. If the fault continues to occur while driving a single
motor with a single output, we have the option to parallel
the DRV8833 outputs which will increase its output current
handling capability. The DRV8833 can drive motors in the
voltage range of 2. 7 to 10. 8 VDC. The motor drive voltage
must be supplied at J1.
We can also put a cap on the walk through of the
DRV8833 output circuitry. The Digilent gear motor resting
in Photo 3 generates those SAx quadrature encoder signals
you see at J3 and J6. The quadrature-formatted encoder
signals are used to indicate speed and direction of the
motor shaft. The raw quadrature-encoded signals are
buffered by IC4 and IC5. The quadrature encoder signals
are optional, and a standard two-wire DC motor can be
driven without the assistance of the SAx quadrature
encoder signals using J5 and J7.
As you can see, the DRV8833’s AISEN and BISEN
current sense pins are both grounded. This indicates that
the motor shield design is not taking advantage of the
DRV8833’s current monitoring pins.
Stepper Motor Driver Hardware
This subsystem does not depend on the DRV8833.
50 SERVO 11.2013
xIN1 xIN2 xOUT1 xOUT2 FUNCTION
0 0 Z Z Coast/fastdecay
0 1 L H Reverse
1 0 H L Forward
1 1 L L Brake/slowdecay
Figure 2. The relationship between the input pins and output pins
is rather obvious. However, it may not be intuitively obvious that fast
decay disables the H-bridge and allows the recirculation current to
flow through the MOSFET body diodes. Slow decay mode shorts the
xIN1 xIN2 FUNCTION
PWM 0 Forward PWM, fast decay
1 PWM Forward PWM, slow decay
0 PWM Reverse PWM, fast decay
PWM 1 Reverse PWM, slow decay
Figure 3. Now that you know what the decay modes consist of,
this too becomes a logical table of operations.
S A Y0 Y1
Figure 4. The automatic high impedance
state change allows the resistors to force their
associated demultiplexer input pin logically low.
Figure 1. There are plenty of words describing the DRV8833 in the
datasheet. Once again, a picture is worth 1,000 of them.