connection. You can also specify a unique MAC address
and security options. Once you’ve entered all of the
required information, the ZENA stack configuration utility
generates a Mi WiDefs.h file based on your entries. The
proof in the pudding is shown in this code snippet which
reflects the MAC address I entered:
// MAC Address
#define EUI_7 0x00
#define EUI_6 0x04
#define EUI_5 0xA3
#define EUI_4 0x11
#define EUI_3 0x22
#define EUI_2 0x33
#define EUI_1 0x44
#define EUI_0 0x55
We also know from experience that the
PIC24FJ/PIC32MX Trainer clocks its CPU at 32 MHz:
// PIC Information
#define CLOCK_FREQ 32000000
#define BAUD_RATE 19200
I specified the baud rate during the Mi Wi stack
configuration process.
The Trainer will be programmed to be a PAN
coordinator, or Personal Area Network boss. In addition to
being coordinator-capable, I configured our Trainer as an
FFD (Full Function Device). Here’s what was generated in
the Mi WiDefs.h code:
// Device Information
#define I_AM_FFD
#define DEVICE_TYPE 1 // FFD
#define I_AM_COORDINATOR_CAPABLE
#define ALTERNATE_PAN_COORDINATOR 1
#define RX_ON_WHEN_IDLE 1
#define POWER_SOURCE 1 // Mains
#define ALLOCATE_ADDRESS 1
As you’ve probably already ascertained, a “1” means I
am what I say I am. If you’ve been privy to our previous
TCP/IP stack discussions, you know that the
aforementioned ASCII definitions are used by various
modules of the stack to make decisions as to what to code
to compile or which logical branch to take. In a nutshell,
our PIC24FJ/PIC32MX Trainer is a coordinator-capable, full
function device that is powered by something other than
batteries, and it has an ear to the ground at all times. The
ASCII and Boolean statements are put into action with the
NOTES:
1. C4 - MOUSER 80-C0805C106K9P - 0805
2. C11-12 - MOUSER 81-GRM21BR61C475KABL - 0805
3. Y1 - MOUSER 559-FQ7050B- 8
4. C1 - NOT MOUNTED
5. C2 - NOT MOUNTED
6. U1 - PIC24FJ256GA006
7. U2 - MRF24J40MB
8. ALL PARTS 0603 SMT UNLESS OTHERWISE NOTED
9. ALL LEDS SMT 1206
3V3 C4 10uF
3V3
3V3
R2
470
R3
470
C3 100nF
RC14
LED2
RC13
LED1
U1
VCAP
ENVREG
RF0
RF1
RE0
RE1
RE2
RE3
RE4
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
RD7
RD6
RD5
RD4
RD3
RD1
RD2
Q2
NUD3105
Q1
NUD3105
3V3
R1
4.7K
C10
C5
100nF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RE5
RE6
RE7
RG6
RG7
RG8
MCLR
RG9
VSS
VDD
RB5
RB4
RB3
SS1/RB2
RB1
RB0
RB6
RB7
AVDD
AVSS
RB8
RB9
RB10
RB11
VSS
VDD
RB12
RB13
RB14
RB15
U2RX
U2TX
RC14
RC13
RD0
RD11
RD10
RD9
SCL1/RG2
VDD
OSC1
OSC2
VSS
INT1/RD8
SDA1/RG3
SCK1/RF6
SDI1/RF2
SDO1/RF3
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
C8
100nF
C9
20pF
3V3
C13
100nF
ICSP
1
2
3
4
5
6
3V3
C6
100nF
C7
7
8
9
10
11
12
SDO
CS
NC
Vin
GND
GND
5V0 3V3
VR1 TC1262-3.3
1 3 IN OUT
C11
4.7uF
C12
4.7uF
R4 470
2 COM
PWR
SCHEMATIC 1.
The MRF24J40MB snaps into the
PIC24FJ/PIC32MX Trainer’s SPI
framework with ease.
70 SERVO 06.2010
