Servo - August 2011

So, we only need to move pin 10 of the JE plug-in connector to the vacant JE pin 8 position.

The physical hardware reconfiguration is complete. A table is worth 1000 electrons (see Table 1). The cable surgery is under the lights in Photo 1. The pinout of the Cerebot 32MX7’s I/O ports doesn’t follow the industry standard of even pin numbers on one column of pins and odd numbered pins on the opposing column. Instead, count from pin 1 down to pin 6. Pin 7 opposes pin 1 and count from pin 7 down to pin 12. The power pins are an easy way to identify the pin numbers as opposing pins 5 and 11 are GND and opposing pins 6 and 12 are VCC.

Compile and Run

In that Photo 1 exists, the Cerebot 32MX7/Pmod WiFi combination passed the magic smoke test. So, let’s compile our TCP/IP stack code and load it using the 32MX7’s Area 51 electronics. I loaded the TCP/IP stack code in debug mode just in case. After turning the code loose, the 32MX7’s LED1 began to flash. That’s a good sign. I then fired up the router’s management screen and took a look at its DHCP client list. Check out Screenshot 11. The MAC address of the host at 192.168.1.100 matches the MAC address of the Pmod WiFi module under the lens in Photo 1.

Since I’m on a roll, let’s see if the HTTP2 server is working. Opening Internet Explorer and entering http://192.168.1.100 resulted in Screenshot 12. All of the interactive buttons and LEDs worked to boot. A Telnet open request to the same IP address proved that our Telnet server application was active as well. Yep. Ping worked too.

PHOTO 1. Be careful. Don't get up on your donkey and declare that pin 2 is across from pin 1. The Cerebot 32MX7's ports number 1 through 6 on one side and 7 through 12 on the opposite side. The trick to remembering this is that opposing pins 5 and 11 are GND and opposing pins 6 and 12 are VCC.

#pragma config CP = OFF
// Code Protect
#pragma config BWP = OFF
 // Boot Flash Write Protect
#pragma config PWP = OFF
 // Program Flash Write Protect
#pragma config ICESEL = ICS_PGx2
 // ICE/ICD Comm Channel Select
#pragma config DEBUG = ON
 // Background Debugger Enable

A Touch of USB

Now that we have the Pmod WiFi module bending the magnetic field, let’s ease into a bit of USB. I’ve already started the merger by modifying our existing PIC32MX795F512L Wi-Fi configuration fuse suite:

#pragma config UPLLEN = ON
 // USB PLL Enabled
#pragma config FPLLMUL = MUL_20
 // PLL Multiplier
#pragma config UPLLIDIV = DIV_2
 // USB PLL Input Divider
#pragma config FPLLIDIV = DIV_2
 // PLL Input Divider
#pragma config FPLLODIV = DIV_1
 // PLL Output Divider
#pragma config FPBDIV = DIV_1
 // Peripheral Clock divisor
#pragma config FWDTEN = OFF
 // Watchdog Timer
#pragma config WDTPS = PS1
 // Watchdog Timer Postscale
#pragma config OSCIOFNC = OFF
 // CLKO Enable
#pragma config POSCMOD = HS
 // Primary Oscillator
#pragma config IESO = OFF
 // Internal/External Switch-over
#pragma config FSOSCEN = OFF
 // Secondary Oscillator Enable
#pragma config FNOSC = PRIPLL
 // Oscillator Selection

Note the addition of USB PLL configuration fuses. I’ve already recompiled with the new USB configuration fuses and everything works as before. The next step involves adding the USB stack components to our Pmod WiFi project. Once the USB stack stuff is installed and verified, the mass storage drivers can be integrated.

The Cerebot 32MX7 is fully capable of being a USB host while servicing the needs of the Pmod WiFi module. A hefty 5.0 volt at four amperes wall wart came with my 32MX7. It will come in handy as the 32MX7 must be powered externally when acting as a USB host. Unlike a USB client, a USB host must provide 5.0 volts at 500 mA at its USB portals.

Next Time

We’ll finish the USB integration. I’ll post all of the Pmod WiFi source code and the raw USB integration statements I’ve melded in thus far in the download package. Meanwhile, I’ll get back to work at Area 51. SV